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FPGA Design Engineers

Company: Kforce
Location: Chandler
Posted on: May 15, 2024

Job Description:

RESPONSIBILITIES:Kforce has a small to medium size global client that is seeking a couple of FPGA Design Engineers in Chandler, AZ due to the growth of the company. We are working directly with the Hiring Manager on this search assignment. The company offers a competitive compensation package including base salary, profit sharing, Straight time overtime after 40 hours, unlimited PTO, 401K matching, etc.Duties Include:* Responsible for the design of embedded FPGAs* Develop conceptual designs and perform trade studies* Generate FPGA design requirements and architecture diagrams* Develop HDL code and testbenches for FPGAs* Perform design analysis that shows compliance to requirements and good design practicesREQUIREMENTS:* Bachelor of Science in Electrical Engineering, Computer Engineering, Physics, or equivalent work experience* A minimum of 2-4 years of FPGA design and/or test experience* Experience with board bring up and troubleshooting in the lab environment* Experience collaborating across engineering disciplines* Strong verbal communicator and proficient at generating technical documentation* VHDL or System Verilog and/or OSVVM coding experience would be ideal* Experience with FPGA design for space applications and testbench design is a plus but not required* Experience designing Digital memory controllers for Flash, SRAM, SDRAM, DDR2/3 is a plusThe pay range is the lowest to highest compensation we reasonably in good faith believe we would pay at posting for this role. We may ultimately pay more or less than this range. Employee pay is based on factors like relevant education, qualifications, certifications, experience, skills, seniority, location, performance, union contract and business needs. This range may be modified in the future.We offer comprehensive benefits including medical/dental/vision insurance, HSA, FSA, 401(k), and life, disability & ADD insurance to eligible employees. Salaried personnel receive paid time off. Hourly employees are not eligible for paid time off unless required by law. Hourly employees on a Service Contract Act project are eligible for paid sick leave.Note: Pay is not considered compensation until it is earned, vested and determinable. The amount and availability of any compensation remains in Kforce's sole discretion unless and until paid and may be modified in its discretion consistent with the law.This job is not eligible for bonuses, incentives or commissions.Kforce is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, or disability status.by Jobble

Keywords: Kforce, Chandler , FPGA Design Engineers, Engineering , Chandler, Arizona

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