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Principal RTL Design Engineer

Company: NXP Semiconductors
Location: Chandler
Posted on: November 20, 2020

Job Description:

NXP Semiconductors enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better and safer. As the world leader in secure connectivity solutions for embedded applications, we are driving innovation in the secure connected vehicle, end-to-end security & privacy and smart connected solutions markets.

Job Description

Description:

This is an exciting and challenging fast paced position that requires working with chip lead for architecture and block definition, will also be involved with the customer during proposal, development and volume ramp-up phases.

Looking for a self motivated and dynamic Digital Design Engineer for development of state of the art portable mixed signal ICs.

Candidate will take ownership of block RTL design and contribute through various phases of the ASIC/SOC design process – Product definition, Architecture, RTL design using verilog, system verilog, verification, synthesys, P&R and STA

Follow BL product design flow and actively seek areas of improvement and enhance the design flow.

Suppport product validation, ATE test and qual team.

Will be an integral part of a cohesive all-star design team reporting direclty to BL Digital Design Manager.

Qualifications:

BSEE/MSEE with minimum 5 years industry experience. Must have worked on multiple IC's; taped-out and in production.

Experience with USB Type C/ USB-PD, UVM a plus.

Experience with other industry standard protocols USB3.0, SATA, PCI, DisplayPort, HDMI is desirable but not required

Experience with SOC designs with onchip ARM or 8051 microcontroller and hardware cryptography design experience is highly desirable

Candidate must be able to work under pressure and deliver on commitments with aggressive and challenging schedules.

Must be handson and possess solid design and architecture experience for chip and system definition, low power design techniques, multiple power domain design, clock gating, multi VT deisgn, CPF and CDC tools.

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

Keywords: NXP Semiconductors, Chandler , Principal RTL Design Engineer, Other , Chandler, Arizona

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